Analytical modeling of fringe capacitance in opposite-doped core-shell junctionless nanowire FET

Abstract An analytical model of Oppositely Doped Core–Shell Junctionless Nanowire Field Effect Transistor (ODCS-JL-NWFET) using surface potential is proposed in this paper. The model incorporates the influence of fringe capacitance through the gate sidewall spacer on the potential distribution function. The analytical results align well with simulated outcomes across various ODCS-JL-NWFET physical parameters, such as threshold voltage, drain current, and subthreshold slope. Furthermore, the model illustrates the impact of channel length scaling on device parameters for different core thicknesses, spacer materials, and core doping concentrations. The results demonstrate that optimizing core thickness, spacer material, and core doping concentration selection can significantly reduce leakage current and subthreshold slope, offering valuable insights for designing at smaller technology nodes with low-power applications.