Occamy: A Preemptive Buffer Management for On-chip Shared-memory Switches

Today's high-speed switches employ an on-chip shared packet buffer. The buffer is becoming increasingly insufficient as it cannot scale with the growing switching capacity. Nonetheless, the buffer needs to face highly intense bursts and meet stringent performance requirements for datacenter applications. This imposes rigorous demand on the Buffer Management (BM) scheme, which dynamically allocates the buffer across queues. However, the de facto BM scheme, designed over two decades ago, is ill-suited to meet the requirements of today's network.

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Publication Details

Published
2025-03-26
DOI
https://doi.org/10.1145/3689031.3717495
Citations
2
Primary Topic
Interconnection Networks and Systems
Type
article
Field-Weighted Citation Impact
2.97
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article

Occamy: A Preemptive Buffer Management for On-chip Shared-memory Switches

Nan Li, Wanchun Jiang, Hao Li, Zhenxing Zhang et al.
2 citations
Interconnection Networks and Systems
2.97
article

Occamy: A Preemptive Buffer Management for On-chip Shared-memory Switches

Nan Li, Wanchun Jiang, Hao Li, Zhenxing Zhang, Danfeng Shan, Zhihu Liang, Fengyuan Ren, Jinchao Ma, Xinyu Wen, Yunguang Li
article en
2 citations

Abstract

Today's high-speed switches employ an on-chip shared packet buffer. The buffer is becoming increasingly insufficient as it cannot scale with the growing switching capacity. Nonetheless, the buffer needs to face highly intense bursts and meet stringent performance requirements for datacenter applications. This imposes rigorous demand on the Buffer Management (BM) scheme, which dynamically allocates the buffer across queues. However, the de facto BM scheme, designed over two decades ago, is ill-suited to meet the requirements of today's network.

Central South University (CN), Xi'an Jiaotong University (CN), Tsinghua University (CN)
Affordable and clean energy
Openalex Percentile: Top 10%
Interconnection Networks and Systems
2.97
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