High-Speed Data Processing System for Optical Analog-to-Digital Converters

Optical Analog-to-Digital Converters (OADC) are devices that directly convert analog optical signals into digital signals. This research has designed an embedded high-speed data acquisition system for OADC using Field-Programmable Gate Arrays (FPGA). The main control chip utilizes the Xilinx Virtex UltraScale series VU9P FPGA, employs GTY IP cores for high-speed data reception, and implements algorithms for high-speed serial data input alignment. The Adsantec ANST7122-KMA flash ADC chip is used to perform the analog-to-digital conversion function. The acquired data is stored in Block RAM resources of FPGA and then uploaded to the host computer via the UART serial port. The data processing system board can synchronously collect signals from five channels. The experimental results show that the system can realize 10GSps data sampling with a sampling accuracy of 4.3 [email protected]. and continuously sample 2<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">16</sup> points. The system integrates data acquisition, data processing, and data transmission onto a single board, offering an architecture with high integration and portability.

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Publication Details

Published
2024-12-27
DOI
https://doi.org/10.1109/eiecc64539.2024.10929330
Primary Topic
Photonic and Optical Devices
Type
article
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High-Speed Data Processing System for Optical Analog-to-Digital Converters

Jian Wu, Zirui Zhao, Qiuyan Li, Ziqi Zhang et al.
Photonic and Optical Devices
article

High-Speed Data Processing System for Optical Analog-to-Digital Converters

Jian Wu, Zirui Zhao, Qiuyan Li, Ziqi Zhang, Jifang Qiu
article en

Abstract

Optical Analog-to-Digital Converters (OADC) are devices that directly convert analog optical signals into digital signals. This research has designed an embedded high-speed data acquisition system for OADC using Field-Programmable Gate Arrays (FPGA). The main control chip utilizes the Xilinx Virtex UltraScale series VU9P FPGA, employs GTY IP cores for high-speed data reception, and implements algorithms for high-speed serial data input alignment. The Adsantec ANST7122-KMA flash ADC chip is used to perform the analog-to-digital conversion function. The acquired data is stored in Block RAM resources of FPGA and then uploaded to the host computer via the UART serial port. The data processing system board can synchronously collect signals from five channels. The experimental results show that the system can realize 10GSps data sampling with a sampling accuracy of 4.3 [email protected]. and continuously sample 2<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">16</sup> points. The system integrates data acquisition, data processing, and data transmission onto a single board, offering an architecture with high integration and portability.

Beijing University of Posts and Telecommunications (CN)
Affordable and clean energy
Openalex Percentile: Top 73%
Photonic and Optical Devices
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High-Speed Data Processing System for Optical Analog-to-Digital Converters — Jian Wu, Zirui Zhao, et al. · (2024) | TGRS Research Map | TGRS