A Comparative Study of Wallace Tree Multiplier and Binary Multiplier Performance
This paper gives an analysis of Wallace Tree (WT) Multiplier and the Binary Multiplier from the point of view of the efficiency with regard to speed, area, and power usage. WT Multiplier is a tree-like structure which consists of full and half adders maintains its sequential addition stages minimal. This leads to shorter computation times, an immense advantage for high-speed applications. The Binary Multiplier, taking the simplest approach of bitwise multiplication and addition, is less complex in design but often slower as a result of its sequential approach. The paper presents a detailed simulation and comparison analysis of both multipliers. Finally, the WT Multiplier can be used in the application of digital signal processing and high-performance computing where speed is essentially paramount and the Binary Multiplier is more suited towards applications where area and power efficiency are prioritized due to the straightforward and simple operation.
Authors
- Shasanka Sekhar Rout (ORCID: https://orcid.org/0000-0002-6032-4125)
- Suyash Sharma
- Manmohan Verma
Institutions
- GLA University (IN)
Publication Details
- Published
- 2024-12-06
- DOI
- https://doi.org/10.1109/ccis63231.2024.10932105
- Citations
- 2
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 0.42