Multi-Modal Optimization of Stacked Chip Macro-Module Layout Based on Memristor-Inspired Evolutionary Game
As the complexity of chip design continues to increase, the stacking of multiple device layers in a three dimension(3D) architecture has emerged as a promising approach, which aims to optimize the placement and interconnections of large function blocks across the vertically-stacked device layers. Due to the complex interactions between layout and design constraints, traditional deterministic optimization often struggle to navigate its multi-modal search landscape effectively. Thus, we creatively propose the memristive evolutionary game: the diverse metal layers engage in a strategic interplay that determines the ownership hierarchy of chip macro modules and the 2D layout of these chip macro modules within each designated metal layer is orchestrated using evolutionary algorithm, which harness the power of game theoretic evolution to seek the optimal solution, balancing the objectives of minimizing layout area and wiring length. Upon comparison with alternative algorithms, the game evolution algorithm introduced in this paper exhibits superior optimization performance.
Authors
- Changqing Li (ORCID: https://orcid.org/0009-0004-2330-2228)
- Mingze Chen (ORCID: https://orcid.org/0000-0002-4265-1544)
- Shukai Duan (ORCID: https://orcid.org/0000-0002-0040-3796)
- Kaikai Qiao
- Ben Ma (ORCID: https://orcid.org/0000-0002-1179-7647)
- Lidan Wang (ORCID: https://orcid.org/0000-0003-0730-4202)
- Ke Ding (ORCID: https://orcid.org/0000-0001-5090-1139)
Institutions
- State Key Laboratory of Vehicle NVH and Safety Technology (CN)
Publication Details
- Published
- 2024-12-27
- DOI
- https://doi.org/10.1109/eiecc64539.2024.10929101
- Primary Topic
- VLSI and FPGA Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China
- Fundamental Research Funds for the Central Universities