Hardware-in-the-Loop Validation of a Modular Multilevel Matrix Converter Fault-Tolerant Control Strategy

The Modular Multilevel Matrix Converter (M<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> C) is a promising topology for high-power applications, offering notable advantages in power quality, efficiency, controllability, and fault tolerance. While the converter can operate under fault conditions, its performance during internal faults still needs to be investigated. This paper addresses this gap by proposing a novel control strategy that increases the voltage of cells adjacent to a faulted cell, ensuring continued operation and stability. The proposed method preserves cluster equilibrium by maintaining the total voltage across the cells, thereby sustaining reliable power transfer. The control system modifies the local balancing scheme of the affected cluster to optimize performance without compromising the power transfer capacity. The effectiveness of the proposed strategy is demonstrated through Hardware-in-the- Loop (HIL) simulations.