High Coverage DDR4 SDRAM Memory Design and Verification Using System Verilog and UVM

DDR4 SDRAM (Double Data Rate 4 Synchronous Dynamic Random-Access Memory) is a cutting-edge memory technology designed to provide superior performance, higher capacity, and improved energy efficiency compared to previous generations. DDR4 memory offers faster data transfer rates, reduced latency, and enhanced reliability, which are crucial for today's data-intensive and performance-driven applications. This project presents the design and verification process of DDR4 SDRAM, focusing on achieving high performance, reliability, and compliance with JEDEC standards. The verification phase employs System Verilog and UVM (Universal Verification Methodology) to rigorously test the memory under various conditions, including functionality and performance of DDR4. The goal is to achieve 100% functional coverage and validate the memory's robustness in real-world applications, ensuring it meets the demands of modern computing environments. The verification process is conducted using the Questasim tool.