Electrostatic Discharge Protection Design With Wide Bandwidth Matching Network for Radio-Frequency Integrated Circuits

The dual-diode circuit as I/O electrostatic discharge (ESD) protection is widely adopted in radio-frequency integrated circuits (RF ICs) due to their low parasitic capacitance and ease of design. A high-performance ESD protection strategy leveraging the dual-diode circuit connected to the virtual ground node of a differential matching network is presented in this work. The unique properties of the virtual ground node effectively eliminate parasitic impacts on the signal path, enabling the integration of larger ESD devices for enhanced protection without compromising RF performance. Fabricated in 28-nm CMOS technology, the proposed design achieves exceptional ESD robustness, surpassing the human-body model (HBM) level of 8 kV. Comprehensive RF measurements reveal uniform performance across all ESD protection configurations, maintaining an impressive matching bandwidth of 37-52 GHz, regardless of the protection diode sizes and ESD level. These findings establish a significant advancement in ESD protection, offering a compelling solution that harmonizes superior ESD robustness with wideband RF performance.