Research on the Layout of Silicon Controlled Rectifier Electrostatic Discharge Protection Devices Based on 0.18μm CMOS Technology

In order to improve the performance of SCR without increasing the device area, the Silicon Controlled Rectifier (SCR) is studied from two aspects, layout drawing and process levels. the impacts of strip layout, octagonal layout, waffle circular layout and circular layout of traditional SCR on capacitance have been studied, and the influence of Dual Gate (DG) layer on the performance of traditional SCR has been investigated. All devices were implemented using 0.18μm CMOS process technology. The test results show that the SCR with circular layout has the smallest capacitance and the highest robustness, and the traditional SCR without DG have a higher holding voltage.