RapidIO-Based Message-Oriented Middleware Design for FPGA Interconnection

Message-oriented middleware is a middleware technology composed of a message-passing mechanism or message queuing pattern, which adopts an efficient and reliable message-passing mechanism for platform-independent data exchange and integrates a distributed system based on data communication. To solve the programming complexity and reliability problems in the interconnection of multiple FPGAs, this paper designs and implements a RapidIO message middleware based on a publish-subscribe mechanism for the FPGA platform. Initially, the system implementation plan is thoroughly researched and designed. Following this, the communication implementation strategy for each FPGA node within the network, along with the publish-subscribe mechanism, is detailed. Finally, the system undergoes comprehensive verification and testing to ensure its functionality and reliability. The test results show that the FPGA message middleware has a bandwidth of up to 1.8GBps and a bit error rate of less than 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−12</sup>, which is suitable for embedded electronic systems with high performance and reliability requirements and has strong application value.