FPGA Implementation of a PWM-Based Digital Communication System for High-Speed Data Transfer

The goal of this project is to design and implement a communication system using Pulse Width Modulation (Abbreviated in the text as PWM) technology. The system uses binary data to represent ASCII characters. It transmits and receives data through the PWM_Sender and PWM_Receiver modules. The communication signal is encoded in PWM form, with a minimum data transmission rate of 9600 baud. The implementation carried out on the DE10 Standard development board. Key objectives include developing a transmitter module that converts input binary data into PWM signal periods and widths, a PWM generation module that creates and sends PWM signals based on the provided period and width parameters, and a receiver module that decodes these PWM signals back into their original binary data. This project demonstrates the practical application of PWM in digital communication systems, with a focus on its implementation on the FPGA DE10 Standard development board.