A Configurable XMSS Post-Quantum Hardware Implementation with SM3 and SHA-256

The eXtended Merkle Signature Scheme (XMSS) is a post-quantum secure signature scheme that is resistant to quantum attacks and has gained significant attention in recent years. This paper proposes an innovative XMSS configurable cryptographic hardware circuit based on hash functions SM3 and SHA-256. By reusing the computational circuits of the hash functions, the proposed design reduces hardware resource consumption and power dissipation. Implementation results on the Zynq-7000 FPGA show that the average signature generation time is 2.75 ms, the average verification time is 0.28 ms, and the computation time meets the requirements for secure boot.

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Publication Details

Published
2024-12-27
DOI
https://doi.org/10.1109/icctit64404.2024.10928459
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
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article

A Configurable XMSS Post-Quantum Hardware Implementation with SM3 and SHA-256

Xuanrong Ji, Ming Ma, Jueping Cai
Parallel Computing and Optimization Techniques
article

A Configurable XMSS Post-Quantum Hardware Implementation with SM3 and SHA-256

Xuanrong Ji, Ming Ma, Jueping Cai
article en

Abstract

The eXtended Merkle Signature Scheme (XMSS) is a post-quantum secure signature scheme that is resistant to quantum attacks and has gained significant attention in recent years. This paper proposes an innovative XMSS configurable cryptographic hardware circuit based on hash functions SM3 and SHA-256. By reusing the computational circuits of the hash functions, the proposed design reduces hardware resource consumption and power dissipation. Implementation results on the Zynq-7000 FPGA show that the average signature generation time is 2.75 ms, the average verification time is 0.28 ms, and the computation time meets the requirements for secure boot.

Xidian University (CN)
Openalex Percentile: Top 68%
Parallel Computing and Optimization Techniques
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