MDH-NAS: Accelerating EEG Signal Classification With Mixed-Level Differentiable and Hardware-Aware Neural Architecture Search

In noninvasive brain-computer interfaces (BCIs), EEG analysis plays a critical role, with neural networks serving as a cornerstone for signal decoding. Existing neural network approaches for EEG signal recognition require extensive manual design and hyperparameter tuning, leading to inefficiencies and making them impractical for embedded devices due to their large model size. To address these limitations, we propose mixed-level differentiable and hardware-aware neural architecture search (MDH-NAS), a framework that automatically generates lightweight neural networks tailored for EEG classification. Unlike traditional DARTS methods, MDH-NAS employs a hybrid optimization strategy that balances global and local search spaces, thereby accelerating and refining architecture discovery. It introduces explicit size constraints during the search process to ensure deployability on embedded devices. MDH-NAS demonstrates autonomous generation of architectures for tasks such as motor imagery (MI) and depression recognition, achieving 87.80% accuracy on the BCI-IV dataset and 90.09% on the MODMA dataset. When deployed on the EAIDK-610 board across heterogeneous tasks, it attains 85.37% accuracy on the EEG Motor Movement/Imagery dataset. This method reduces architecture discovery time by 89% and enhances prediction accuracy by 8.70% compared to baseline methods, highlighting its potential for scalable EEG analysis and real-world embedded deployment.

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Publication Details

Journal
IEEE Internet of Things Journal
Published
2025-03-24
DOI
https://doi.org/10.1109/jiot.2025.3553450
Citations
5
Primary Topic
EEG and Brain-Computer Interfaces
Type
article
Field-Weighted Citation Impact
7.16

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article

MDH-NAS: Accelerating EEG Signal Classification With Mixed-Level Differentiable and Hardware-Aware Neural Architecture Search

Lixian Zhu, Fuze Tian, Kai Zheng, Ran Cai et al.
5 citations
IEEE Internet of Things Journal
EEG and Brain-Computer Interfaces
7.16
article

MDH-NAS: Accelerating EEG Signal Classification With Mixed-Level Differentiable and Hardware-Aware Neural Architecture Search

Lixian Zhu, Fuze Tian, Kai Zheng, Ran Cai, Jian Zhang, Xiaokun Jin, Bin Hu, Su Wang, Shuting Sun
article en
5 citations

Abstract

In noninvasive brain-computer interfaces (BCIs), EEG analysis plays a critical role, with neural networks serving as a cornerstone for signal decoding. Existing neural network approaches for EEG signal recognition require extensive manual design and hyperparameter tuning, leading to inefficiencies and making them impractical for embedded devices due to their large model size. To address these limitations, we propose mixed-level differentiable and hardware-aware neural architecture search (MDH-NAS), a framework that automatically generates lightweight neural networks tailored for EEG classification. Unlike traditional DARTS methods, MDH-NAS employs a hybrid optimization strategy that balances global and local search spaces, thereby accelerating and refining architecture discovery. It introduces explicit size constraints during the search process to ensure deployability on embedded devices. MDH-NAS demonstrates autonomous generation of architectures for tasks such as motor imagery (MI) and depression recognition, achieving 87.80% accuracy on the BCI-IV dataset and 90.09% on the MODMA dataset. When deployed on the EAIDK-610 board across heterogeneous tasks, it attains 85.37% accuracy on the EEG Motor Movement/Imagery dataset. This method reduces architecture discovery time by 89% and enhances prediction accuracy by 8.70% compared to baseline methods, highlighting its potential for scalable EEG analysis and real-world embedded deployment.

IEEE Internet of Things JournalVol. 12(13)
Beijing Institute of Technology (CN), Lanzhou University (CN)
National Natural Science Foundation of China, China Postdoctoral Science Foundation, Fundamental Research Funds for the Central Universities
Openalex Percentile: Top 3%
EEG and Brain-Computer Interfaces
7.16
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