Multiphysics-Informed ML-Assisted Chiplet Floorplanning for Heterogeneous Integration

The floorplan of chiplets in heterogeneously integrated systems-in-package (SiPs) must consider multiphysics (electrical, thermal, and mechanical) performance and meet positional constraints during optimization. This article sets forth an efficient framework for chiplet floorplanning subject to positional and multiphysics-performance-based constraints. Traditional multiphysics simulations, often impractical in optimization due to high computational cost, are replaced by a high-fidelity and efficient conditional image generative model via image-based machine learning (ML). This model is accurate and capable of performing real-time prediction of multiphysics performance throughout 3-D SiPs. Utilizing the image-based ML model for fast performance assessment, we further accelerate the physical design by developing a novel and highly parallelizable dynamic rank-revealing (RR) algorithm for solving the underlying constrained optimization problem. We leverage this algorithm to optimize the position of the chiplets subject to multiphysics performance directly without floorplan representation or convexification techniques while meeting a multitude of constraints. The same ML model and constraints are also integrated into a state-of-the-art corner block list (CBL) floorplan representation under a simulated annealing (SA) optimization framework. The accuracy and efficiency of the proposed optimization method are demonstrated in the floorplanning of chiplets on an interposer subject to thermal constraints, and by comparisons against ML-assisted SA-CBL for performing the same task.

Authors

Institutions

Publication Details

Journal
IEEE Transactions on Components Packaging and Manufacturing Technology
Published
2025-03-24
DOI
https://doi.org/10.1109/tcpmt.2025.3553840
Citations
1
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
0.73

Funders

Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Multiphysics-Informed ML-Assisted Chiplet Floorplanning for Heterogeneous Integration

Seunghyun Hwang, Dan Jiao, Vinicius C. do Nascimento, Ganesh Subbarayan et al.
1 citations
IEEE Transactions on Components Packaging and Manufacturing Technology
3D IC and TSV technologies
0.73
article

Multiphysics-Informed ML-Assisted Chiplet Floorplanning for Heterogeneous Integration

Seunghyun Hwang, Dan Jiao, Vinicius C. do Nascimento, Ganesh Subbarayan, Tejas Kulkarni, Qiang Qiu, Michael J. Smith, Cheng‐Kok Koh
article en
1 citations

Abstract

The floorplan of chiplets in heterogeneously integrated systems-in-package (SiPs) must consider multiphysics (electrical, thermal, and mechanical) performance and meet positional constraints during optimization. This article sets forth an efficient framework for chiplet floorplanning subject to positional and multiphysics-performance-based constraints. Traditional multiphysics simulations, often impractical in optimization due to high computational cost, are replaced by a high-fidelity and efficient conditional image generative model via image-based machine learning (ML). This model is accurate and capable of performing real-time prediction of multiphysics performance throughout 3-D SiPs. Utilizing the image-based ML model for fast performance assessment, we further accelerate the physical design by developing a novel and highly parallelizable dynamic rank-revealing (RR) algorithm for solving the underlying constrained optimization problem. We leverage this algorithm to optimize the position of the chiplets subject to multiphysics performance directly without floorplan representation or convexification techniques while meeting a multitude of constraints. The same ML model and constraints are also integrated into a state-of-the-art corner block list (CBL) floorplan representation under a simulated annealing (SA) optimization framework. The accuracy and efficiency of the proposed optimization method are demonstrated in the floorplanning of chiplets on an interposer subject to thermal constraints, and by comparisons against ML-assisted SA-CBL for performing the same task.

IEEE Transactions on Components Packaging and Manufacturing TechnologyVol. 15(5)
Purdue University West Lafayette (US)
National Science Foundation, Purdue University
Openalex Percentile: Top 30%
3D IC and TSV technologies
0.73
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.