An analog front-end with high common-mode rejection ratio and high input impedance for single-lead ECG signal acquisition
This paper proposes an analog front-end circuit applicable to single-lead ECG signal acquisition based on a 0.18 um process. The circuit employs an AC capacitive coupling instrument amplifier (ACIA) with a DC servo loop, significantly improving input impedance. Simulation results indicate an input reference noise of 8.538 uVrms, an ECG signal voltage amplification factor of 30 V/V to 240 V/V, and an input impedance of 4.59 GΩ @15 Hz. The circuit also features low input noise and a high common-mode rejection ratio of 114 dB.
Authors
- Weifeng Liu (ORCID: https://orcid.org/0000-0002-0408-1149)
- Qingyang Feng (ORCID: https://orcid.org/0009-0005-3454-5206)
- Bowen Zheng (ORCID: https://orcid.org/0000-0002-7252-962X)
- Dong Li (ORCID: https://orcid.org/0000-0002-9180-7402)
- Wenbo Li (ORCID: https://orcid.org/0009-0001-0801-906X)
- Yinghong Wen (ORCID: https://orcid.org/0000-0002-5604-2985)
Institutions
- Xidian University (CN)
Publication Details
- Journal
- IEICE Electronics Express
- Published
- 2025-03-23
- DOI
- https://doi.org/10.1587/elex.22.20250097
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China