Generation of PWM and PFM with variable duty cycle using BRAM

The research in this paper presents a novel approach for generating Pulse Width Modulation (PWM) or Pulse Frequency Modulation (PFM) signals with variable duty cycles using Block RAM (BRAM) which is a type of on-chip random-access memory (RAM) found on most FPGAs, providing high-density, fast access memory capabilities. The proposed system features a multiplexer (MUX), which is realized to select the appropriate value from BRAM containing 32-bit duty cycle values used to implement the PWM and PFM logic and generating the desired output signal. Internally the user input, facilitated through buttons, determines the MUX select values, thereby controlling the generated output. Additionally, a flag is incorporated for the purpose of selecting between generation of PWM or PFM signals according to the user input. This approach offers a versatile and efficient method for generating PWM and PFM signals, demonstrating its potential for various applications in fields like power electronics and signal processing.