Two-Stage Op Amp Design and Flash ADC Implementation

Recently, an analysis of a 3-bit resolution flash analog-to-digital converter (ADC) was performed. Created using L T spice tools and 90 nm technology, this configuration includes a resistor ladder network, comparator, thermometer, and binary encoder. Utilizing a two-stage operational amplifier as a comparator, the conductor network's reference voltage is set to 1.8 V for the flash ADC. Using a priority encoder, the thermometer code is converted to binary format. Higher bit resolution means larger circuit size and higher power consumption. This is the main problem with flash ADCs. This research addresses this problem by optimizing the encoder circuit decreases the power consumption of A D C.