FPGA-Based SoC Design with CORDIC-POSIT Arithmetic for Efficient IoT Data Processing

The integration of Field-Programmable Gate Array (FPGA) technology-driven System-on-Chip (SoC) solutions in Internet of Things (IoT) applications has been significantly enhanced by employing Coordinate Rotation Digital Computer (CORDIC) and Positive Integer and Signed Integer Ternary (POSIT) for efficient sensor data management. By incorporating XADC embedded capabilities within the SoC architecture, the need for external Analog-to-Digital Converters (ADCs) is eliminated, leading to a more compact and power-efficient system. The CORDIC algorithm facilitates accurate trigonometric and logarithmic computations, which are crucial for precise sensor data processing, particularly for soil moisture measurements using capacitance sensors. Furthermore, POSIT arithmetic improves numerical accuracy and minimizes error in calculations, optimizing overall system performance. FPGA implementations demonstrated remarkable efficiency, utilizing only 2.10% of LUTs, with the processor segment consuming just 1.60% of the SoC resources. This CORDIC-POSIT-enabled framework was implemented and tested on the ZedBoard Zynq-7000 Development Board, resulting in significant enhancements in operational efficiency and real-time data processing capabilities within IoT sensor networks.

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Published
2024-11-23
DOI
https://doi.org/10.1109/icicat62666.2024.10923249
Primary Topic
Numerical Methods and Algorithms
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article
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article

FPGA-Based SoC Design with CORDIC-POSIT Arithmetic for Efficient IoT Data Processing

Babita Jajodia, Satnam Singh
Numerical Methods and Algorithms
article

FPGA-Based SoC Design with CORDIC-POSIT Arithmetic for Efficient IoT Data Processing

Babita Jajodia, Satnam Singh
article en

Abstract

The integration of Field-Programmable Gate Array (FPGA) technology-driven System-on-Chip (SoC) solutions in Internet of Things (IoT) applications has been significantly enhanced by employing Coordinate Rotation Digital Computer (CORDIC) and Positive Integer and Signed Integer Ternary (POSIT) for efficient sensor data management. By incorporating XADC embedded capabilities within the SoC architecture, the need for external Analog-to-Digital Converters (ADCs) is eliminated, leading to a more compact and power-efficient system. The CORDIC algorithm facilitates accurate trigonometric and logarithmic computations, which are crucial for precise sensor data processing, particularly for soil moisture measurements using capacitance sensors. Furthermore, POSIT arithmetic improves numerical accuracy and minimizes error in calculations, optimizing overall system performance. FPGA implementations demonstrated remarkable efficiency, utilizing only 2.10% of LUTs, with the processor segment consuming just 1.60% of the SoC resources. This CORDIC-POSIT-enabled framework was implemented and tested on the ZedBoard Zynq-7000 Development Board, resulting in significant enhancements in operational efficiency and real-time data processing capabilities within IoT sensor networks.

Indian Institute of Information Technology Guwahati (IN)
Openalex Percentile: Top 68%
Numerical Methods and Algorithms
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FPGA-Based SoC Design with CORDIC-POSIT Arithmetic for Efficient IoT Data Processing — Babita Jajodia, Satnam Singh · (2024) | TGRS Research Map | TGRS