Ultrahigh voltage-gradient ZnO-based varistor ceramics via hybrid cold sintering process/spark plasma sintering and post-annealing process

A high voltage gradient (<i>V</i>_g) of ZnO-based varistor ceramics is critical for realizing miniaturized and lightweight overvoltage protection devices. However, improving <i>V</i>_g of ZnO-based varistor ceramics through conventional high-temperature sintering process remains a significant challenge. Here, we present a strategy to fabricate ultrahigh voltage-gradient ZnO-based varistor ceramics by combining cold sintering process/spark plasma sintering (CSP–SPS) with post-annealing process. Employing CSP–SPS, the ZnO-based varistor ceramics were initially densified at 300 °C and subsequently annealed at a low temperature of 700–900 °C. CSP<strong>–</strong>SPS technique combined with a low annealing temperature enables the production of ZnO-based varistor ceramics with fine and homogeneous microstructures, while suppressing the volatilization of Bi-rich phases at grain boundaries. This approach achieves the ultrahigh <i>V</i>_g of ~1832.71 V/mm, high nonlinear coefficient (<i>α</i>) of ~106.69, and low leakage current density (<i>J</i>_L) of less than 0.2 μA/cm². This work shows that the integration of CSP–SPS and post-annealing provides a promising way to design ZnO-based varistor ceramics with ultrahigh <i>V</i>_g.