Optimal Layout of Embedding onto Folded Hypercubes

Graph embedding is the major technique which is used to map guest graph into host graph. In architecture simulation, graph embedding is said to be one of the strongest application for the execution of parallel algorithms and simulation of various interconnection networks. In the recent paper [ 1 ], Berin et al. proposed a novel approach for embedding an augmented hypercube into a tree-like networks and provided the minimum wirelength of the resulting embedding, and they mentioned that this problem is open for other guest networks. In this paper, we solve one of the open problems by considering folded hypercube as the guest network. Additionally, we discuss the implementation of rooted complete binary tree in Network On Chips. Our findings contribute to the optimization of VLSI layout and provide insights into the design of efficient network structures.

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Publication Details

Journal
International Journal of Foundations of Computer Science
Published
2025-03-18
DOI
https://doi.org/10.1142/s0129054125500066
Citations
2
Primary Topic
Interconnection Networks and Systems
Type
article
Field-Weighted Citation Impact
2.97
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article

Optimal Layout of Embedding onto Folded Hypercubes

R. Sundara Rajan, L. Packiaraj, Rini Dominic, T. M. Rajalaxmi
2 citations
International Journal of Foundations of Computer Science
Interconnection Networks and Systems
2.97
article

Optimal Layout of Embedding onto Folded Hypercubes

R. Sundara Rajan, L. Packiaraj, Rini Dominic, T. M. Rajalaxmi
article en
2 citations

Abstract

Graph embedding is the major technique which is used to map guest graph into host graph. In architecture simulation, graph embedding is said to be one of the strongest application for the execution of parallel algorithms and simulation of various interconnection networks. In the recent paper [ 1 ], Berin et al. proposed a novel approach for embedding an augmented hypercube into a tree-like networks and provided the minimum wirelength of the resulting embedding, and they mentioned that this problem is open for other guest networks. In this paper, we solve one of the open problems by considering folded hypercube as the guest network. Additionally, we discuss the implementation of rooted complete binary tree in Network On Chips. Our findings contribute to the optimization of VLSI layout and provide insights into the design of efficient network structures.

International Journal of Foundations of Computer ScienceVol. 36(08)
Sri Ramachandra Institute of Higher Education and Research (IN), Engineering Arts (United States) (US), Hindustan Institute of Technology and Science (IN), Sri Sivasubramaniya Nadar College of Engineering (IN)
Openalex Percentile: Top 10%
Interconnection Networks and Systems
2.97
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