Analyzing Fully Depleted SOI NC‐MOSFET for Enhanced Bio‐Sensor and Digital Circuit Applications

The proposed research paper focuses on the study of fully depleted silicon (Si)‐on‐insulator negative capacitance metal oxide‐semiconductor field‐effect transistor (FDSOI‐NC‐MOSFET) performance for biosensor and digital circuit applications. The study mainly aims to use ferroelectric (FE) material to improve the performance and efficiency of FDSOI‐NC‐MOSFETs compared to conventional planar MOSFETs. Using TCAD software, the proposed device is simulated and analyzed under various parameter conditions (parameters like temperature, channel thickness, input supply voltages, and channel doping levels). Later, the proposed device is also designed for different biomolecular structures to analyze the selectivity and sensitivity behavior of the device. Sensitivity is the change in electrical characteristics in response to applied external stimuli or parameters like current and voltages. Variations in these parameters will affect the operating region of the device, thereby, the choice of parameters in achieving the best performance will depend on the operating conditions and device applications. NC‐MOSFET with FE materials can obtain an acceptable on/off current ratio by lowering the off current and can achieve an adequate subthreshold swing (SS), thus, observed that the NC‐MOSFET device has enhanced performance and transfer characteristics in comparison to planar MOSFET. For K = 4, at an input voltage of 0.25 V, the I on / I off ratio was 6.21 × 10 5 and the sensitivity was 6.20 × 10 7 and at 0.5 V, these values rise to 8.07 × 10 5 and 8.073 × 10 7 , respectively. Similarly for K = 6 and at an input voltage of 0.25 V, we observed an I on / I off ratio is 1.5 × 10 7 and a sensitivity of 1.52 × 10 9 . When the input voltage was increased to 0.5 V, the I on / I off ratio improved to 2.07 × 10 7 and the sensitivity increased to 2.073 × 10 9 . From these analyses, it is apparent that as the K ‐values increase at a given input voltage, both the I on / I off ratio and the sensitivity also increase significantly. Finally, in this paper, we also demonstrated the implementation and simulation of digital logic gates using the proposed NC‐MOSFET device, supporting circuit‐level design applications.