A Multi-Tenant Rate Limiter on FPGA
Field-programmable gate arrays (FPGAs) are extensively utilized to accelerate virtualized network functions (VNFs) within cloud networks. Imposing rate limits on different flows can enhance the overall bandwidth utilization of the network. Existing hardware token bucket approaches fundamentally trade off resource efficiency against configuration granularity when supporting massive queues (>512). This paper proposes a novel rate-limiting method based on the token bucket algorithm and achieves efficient resource utilization through head packet scheduling and token-to-time conversion. The experimental results show that our method achieves 1.16% lookup-table (LUT) and 2.62% flip flop (FF) resource usage compared to state-of-the-art methods, while supporting 512 queues with <0.4% rate deviation across a 100 Kbps–10 Gbps range (5-decade dynamic range).
Authors
- Zhichuan Guo (ORCID: https://orcid.org/0000-0003-2489-9949)
- Mengting Zhang
- Yunfei Guo (ORCID: https://orcid.org/0009-0001-9058-1085)
Institutions
- Chinese Academy of Sciences (CN)
- Institute of Acoustics (CN)
- University of Chinese Academy of Sciences (CN)
Publication Details
- Journal
- Electronics
- Published
- 2025-03-15
- DOI
- https://doi.org/10.3390/electronics14061155
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Institute of Acoustics, Chinese Academy of Sciences