The Influence of Phase-Locked Loop Control on Converter Performance under Non-ideal Grids

Phase-locked loops (PLLs) are often used to achieve tracking of grid phase. Under non-ideal grid conditions, whether a PLL can continue to quickly and accurately track and lock the phase is one of the criteria for evaluating the performance of a PLL structure. Therefore, this paper introduces several new PLL structures, selecting SRF-PLL, APF-SRF-PLL, DSOGI-SRF-PLL, and DDSRF-PLL as representatives to explore their phase-locking performance under three different scenarios: ideal grid, three- phase voltage imbalance, phase step changes, frequency variations, and harmonic distortion. Simulation models of the four PLLs were built in MATLAB/Simulink, and simulations were carried out under various conditions. Finally, a comparative analysis of the results for each PLL is presented.