Energy Efficient On-Chip Memory for Next Generation MCU

Microcontroller units (MCUs) are increasingly required to be energy-conserving for IoT applications. Emerging devices, such as magnetic tunnel junctions and tunnel field-effect transistors (TFETs), present innovative solutions for ultra-low-power embedded memories. This brief demonstrates MRAM and TFET-SRAM as alternatives to embedded Flash and retention SRAM in MCUs, respectively. A specially designed sense amplifier capable of bidirectional voltage differential amplification enables two readouts during the charge/discharge phase of bit lines. Furthermore, a mismatch-aware latch amplifier is proposed to yield considerable read accuracy of MRAM. The bidirectional read strategy, named Ri-Fa, efficiently eliminates unnecessary error correction process. Under 28-nm CMOS technology, the 512Kb MRAM achieves <15ns read speed with an extremely high energy efficiency of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.23{\mu }$ </tex-math></inline-formula>A/MHz. Furthermore, the TFET/CMOS hybrid bit-cell introduces an extra n-type TFET to gate the supply of SRAM in retention mode, suppressing the leakage current of 1Kb macro to 6nA. The 55-nm MCU with TFET-SRAM presents a record ultra-low standby power of 75nA.