Metastable-Dither-Based Digital Background Calibration of Interstage Gain Nonlinearity in Pipelined SAR ADC

A digital background calibration technique is proposed in this brief, utilizing comparator metastability to correct conversion errors from interstage gain errors and higher order nonlinearities for the first time. The method calibrates nonlinear conversion errors by injecting multilevel dithers and observing amplifier gain variations. It offers advantages, such as simple design, high accuracy, fast convergence, and low power consumption. Simulation results demonstrate the effectiveness of the technique, with the signal to noise and distortion ratio (SNDR) and spurious free dynamic range (SFDR) performances of a 14-bit two-stage pipelined successive approximation register analog-to-digital converter (SAR ADC) improving from 60.4 and 73.6 to 84.5 and 110.0 dB, respectively. The convergence speed of the calibration algorithm is 0.8 million samples.