A Novel TSV Repair Framework for 3-D Stacked ICs

The demand for small, multifunctional electronic products with high performance is an important requirement now a days. 3-D-stacked integrated circuits (ICs) that employ through-silicon vias (TSVs) to connect multiple dies is the promising solution to meet this demand. However, TSV based interconnections invite some new problems such as TSV defects which may arise during the assembly process of 3D SIC. Therefore, defects could lead to reduced service life of 3D ICs. To overcome this problem, efficient repair solutions are needed. The popular method is to use redundant TSVs. Most of the existing TSV redundancy strategies consider uniformly distributed TSV faults and use of neighboring TSVs to be replaced by faulty TSVs. However, the presence of a defective TSV may likely create faulty TSVs in its neighboring. Due to the presence of such clustering effect, most of the TSV repair techniques are less effective. To resolve this problem, we propose an efficient and flexible TSV redundancy strategy based on diagonal routing which explores the ways to improve the existing scheme for repairing faulty TSVs by establishing additional diagonal flows in the TSV grid apart from the existing traditional flows (west to east and north to south). For this purpose, we examine the advancements of introducing diagonal flows into existing TSV architecture. We investigate the improvements in repair length due to shortening of the repair route. We also want to see whether this advancement leads to an increase in yield. This approach maximizes the use of spare TSVs to repair faulty systems, with minimal impact on area.