Design and Simulation of Fault Detection Technique for NAND Based Memory Array

NAND flash memory, known for its high-density storage and non-volatility, is widely used in various applications where reliable data storage is critical. Ensuring the integrity of stored data requires effective fault detection methods and correction mechanisms, particularly for stuck-at faults, which are common in NAND memory architectures. This paper focuses on testing NAND flash memory array, employing the March algorithm due to its proven efficiency in detecting such faults. This work demonstrates detailed modeling of floating-gate cell (FG Cell), a 4x4 memory array, sense amplifier, and decoders using HSPICE. Simulation results illustrate electrical behavior of the modeled components.The results demonstrate that the March algorithm efficiently detects stuck-at faults within the memory array, enhancing the reliability and performance of NAND memory systems. The HSPICE modeling provides accurate insights into the behavior of memory cells, sense amplifiers, and decoders under various conditions, offering a robust framework for future memory testing and verification efforts.