SFCM-HT: Hardware Trojan Detection Based on Sequence Features with a Combination Model

In the context of the globalization of the Integrated Circuit (IC) industry, the Intellectual Property Cores (IPs) assume a pivotal role, offering the potential to streamline the development process and reduce costs. However, the use of IPs from third parties introduces the potential for malicious modifications, such as the insertion of hardware Trojans (HTs), which can compromise the security and reliability of hardware designs. Despite the advent of deep learning-based HT detection methods that leverage circuit sequences and graph data, which have overcome the limitations of a lack of a golden model and scalability issues, there are still shortcomings in the utilization of global and local features. We develop an HT detection method SFCM-HT based on a combination model of the graph convolutional network (GCN) and the gated recurrent unit (GRU). We transform the Register Transfer Level (RTL) design to a graph structure and model the graph as fixed-length sequences and innovatively construct the combination model to predict sequences related to HTs. We exploit the capacity of GCN to learn features locally and utilize circuit structure information globally, as well as the aptitude of GRU for learning and predicting circuit sequence features. We evaluate the model based on benchmark circuits in Trusthub. SFCM-HT detects Trojan sequences with 98.20% Precision and 98.76% Recall and effectively reduces detection time.