Switching transient regulation using the parasitic inductance energy of IGBTs

Due to the influence of chip package and circuit design, there is much parasitic inductance of power devices. Parasitic inductance may cause problems such as gate signal oscillation or an increase in electrical stresses. Therefore, reducing parasitic inductance is an important design index. However, parasitic inductance can not be completely eliminated. It is more effective and practical to control switching transient of power devices by using the energy stored in parasitic inductance. This paper constructed a comprehensive parasitic inductance model of power devices by using distributed parameter coupling extraction method. And the energy interaction on parasitic inductance was analyzed by using instantaneous energy integration method. Furthermore, energy transfer branches were proposed to realize the energy transfer on parasitic inductance and the shunt of displacement current generated by dvce/dt, which could control the slope of voltage and current separately. The proposed technique enables simultaneous optimization of switching losses and electrical stresses. The proposed method was experimentally verified on IGBT device IKW75N60T in double-pulse test. The current overshoot and voltage overshoot can be reduced by 12.0% and 14.5% respectively. And turn-on losses and turn-off losses can be reduced by 4.16% and 7.6% respectively.