AegisGAN: A Generative Adversarial Network Approach for Efficient and Adaptive Hardware Trojan Detection

Detecting Hardware Trojans (HTs) in integrated circuits presents a significant challenge due to their stealthy activation mechanisms, which rely on rare signal combinations. Traditional detection methods, such as side-channel analysis and statistical test pattern generation, struggle with scalability, high computational costs, and the reliance on “golden reference” circuits, making them unsuitable for modern complex hardware designs. To address these limitations, we introduce AegisGAN, a generative adversarial network (GAN)-based framework that not only generates optimized input patterns to activate rare signals associated with HTs but also eliminates the need for a “golden reference” design. Unlike existing methods, AegisGAN adapts to varying circuit complexities through an innovative adaptive training mechanism, which enhances its flexibility and robustness. Our approach significantly reduces the computational overhead, offering a more scalable, efficient, and accurate solution for HTs detection. Experimental results on standard benchmarks show that AegisGAN achieves 86.6% rare nets coverage and reduces test length by 4.2<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sup>, demonstrating its superiority over traditional methods in real-world IC security applications.

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Publication Details

Published
2024-12-13
DOI
https://doi.org/10.1109/icftic64248.2024.10913378
Primary Topic
Physical Unclonable Functions (PUFs) and Hardware Security
Type
article
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article

AegisGAN: A Generative Adversarial Network Approach for Efficient and Adaptive Hardware Trojan Detection

Wei Cheng, Zhe Li, Zekun Chen, Yaohua Wang
Physical Unclonable Functions (PUFs) and Hardware Security
article

AegisGAN: A Generative Adversarial Network Approach for Efficient and Adaptive Hardware Trojan Detection

Wei Cheng, Zhe Li, Zekun Chen, Yaohua Wang
article en

Abstract

Detecting Hardware Trojans (HTs) in integrated circuits presents a significant challenge due to their stealthy activation mechanisms, which rely on rare signal combinations. Traditional detection methods, such as side-channel analysis and statistical test pattern generation, struggle with scalability, high computational costs, and the reliance on “golden reference” circuits, making them unsuitable for modern complex hardware designs. To address these limitations, we introduce AegisGAN, a generative adversarial network (GAN)-based framework that not only generates optimized input patterns to activate rare signals associated with HTs but also eliminates the need for a “golden reference” design. Unlike existing methods, AegisGAN adapts to varying circuit complexities through an innovative adaptive training mechanism, which enhances its flexibility and robustness. Our approach significantly reduces the computational overhead, offering a more scalable, efficient, and accurate solution for HTs detection. Experimental results on standard benchmarks show that AegisGAN achieves 86.6% rare nets coverage and reduces test length by 4.2<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sup>, demonstrating its superiority over traditional methods in real-world IC security applications.

National University of Defense Technology (CN)
Openalex Percentile: Top 69%
Physical Unclonable Functions (PUFs) and Hardware Security
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