Evaluating Power and Thermal Performance of Ten’s Complement on FPGA Board

Given the increasing demand for energy-efficient digital systems, reducing power consumption in communication circuits is vital in the search for sustainable, green communication. By prioritizing the execution of a particular operation on a Spartan FPGA board, this study overcomes the energy limits in digital circuits. Although the design yields outstanding performance in basic arithmetic operations, the first focus is given to power savings based on the reported 1.656 watts during testing. With a thermal margin of 56°C and no too significant heat generation, good thermal control ensured the system was kept within safe operating parameters. Using just 2.0% of I/O capacity, the design also exhibited effective resource economy. Through hardware performance improvement, this work stresses the capabilities of simple operations like ten's complement to drive energy-efficient design strategies on FPGA systems.

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Publication Details

Published
2024-11-22
DOI
https://doi.org/10.1109/aece62803.2024.10911722
Primary Topic
VLSI and FPGA Design Techniques
Type
article
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article

Evaluating Power and Thermal Performance of Ten’s Complement on FPGA Board

Sonam Mittal, Gurdeep Singh
VLSI and FPGA Design Techniques
article

Evaluating Power and Thermal Performance of Ten’s Complement on FPGA Board

Sonam Mittal, Gurdeep Singh
article en

Abstract

Given the increasing demand for energy-efficient digital systems, reducing power consumption in communication circuits is vital in the search for sustainable, green communication. By prioritizing the execution of a particular operation on a Spartan FPGA board, this study overcomes the energy limits in digital circuits. Although the design yields outstanding performance in basic arithmetic operations, the first focus is given to power savings based on the reported 1.656 watts during testing. With a thermal margin of 56°C and no too significant heat generation, good thermal control ensured the system was kept within safe operating parameters. Using just 2.0% of I/O capacity, the design also exhibited effective resource economy. Through hardware performance improvement, this work stresses the capabilities of simple operations like ten's complement to drive energy-efficient design strategies on FPGA systems.

Chitkara University (IN)
Affordable and clean energy
Openalex Percentile: Top 74%
VLSI and FPGA Design Techniques
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