Optimization Algorithms for Wiring and Thermal Management of 3D Integrated Circuits

In response to the wiring complexity and thermal management issues in the current 3D integrated circuit design(three-dimensional integrated circuit, 3D IC), an optimization algorithm based on simulated annealing and a heat diffusion model are introduced to improve wiring efficiency while effectively controlling thermal effects. First, the simulated annealing algorithm is used to globally optimize the wiring path to reduce signal transmission delay and reduce wiring resource consumption. Then, the finite element method is used to construct a heat diffusion model to analyze the heat distribution, and the chip's heat dissipation path is optimized based on the wiring information to avoid local overheating. Finally, based on the proposed optimization method, it is verified on multiple experimental platforms. The results show that this method can effectively improve the thermal management performance while reducing the wiring complexity, reducing the chip temperature by 5.6% on average, and improving the integration and processing capabilities under design constraints. In terms of wiring length, the comprehensive optimization method significantly reduces the length of each module. For example, module A is reduced from 50mm to 42mm, and modules Band D are reduced from 80mm and 90mm to 68mm and 79mm respectively, optimizing the space layout and shortening the signal path. The wiring and thermal management optimization algorithm based on simulated annealing proposed in this study not only shows high efficiency in wiring optimization, but also effectively solves the thermal management problem in 3D integrated circuits, and has broad application prospects.