CPU -GPU Heterogeneous Stencil Computation Algorithm Based on Dynamic Hybrid Fragmentation Partitioning

Stencil computation, an algorithm that uses fixed stencils for computation, has widespread applications in fields such as image processing and computational fluid dynamics simulations. In recent years, the loop tiling strategy for parallel stencil computation has been extensively developed. Loop tiling technology accelerates computation on heterogeneous computing components by utilizing parallelism and data locality. However, existing tiling strategies have not effectively addressed the issues of cooperative computation across heterogeneous computing components and excessive computational space complexity. This paper proposes a CPU-GPU heterogeneous stencil computation algorithm based on dynamic, hybrid fragmentation partitioning. This algorithm uses a decision tree model, combined with a dynamic allocation strategy, to accurately distribute tasks across heterogeneous computing components. It optimizes instruction-level operations for CPU computation to improve vector computation speed. Additionally, leveraging tiling characteristics, the algorithm reduces space complexity during computation, enabling the concurrent execution of a broader range of data. This algorithm is implemented on the PSkel framework. Our experimental results demonstrate that the proposed algorithm can achieve speedups of up to 18 times when compared to traditional serial computation. Compared to GPU-only computation, it achieves a maximum speedup of 1.31x, and compared to traditional tiling methods, it achieves a maximum speedup of 1.22x.