Performance Analysis of Crossover Ring Oscillator PUF Using Transmission Gate Logic Multiplexer

In the era of hardware security, Physically Unclonable Functions (PUFs) have initiated as a promising technology to generate unique, device-specific secret keys, thus enhancing security in IoT devices also. PUFs exploit the manufacturing variations, which enable unclonability features to replicate or reproduce the same outputs. However, despite their advantages, PUFs can be susceptible to machine learning-based modeling attacks that aim to predict their responses, thereby compromising their effectiveness in generating secure keys. To further enhance the robustness against attacks and improve the unpredictability of Challenge-Response Pairs (CRPs), various crossover mechanisms have been integrated with multiplexer (MUX) configurations in PUF designs. However, these increase the area of PUF and mitigate the faster switching facilities of hardware devices. Our paper introduces a frequency-enhanced faster switching with an area efficient using less transistor Crossover Ring Oscillator (CRO) PUF. In the intercrossing stages of CRO PUF, our method utilizes Transmission Gate Logic (TGL)-based MUX configuration giving the ring inverter output to the sources of pMOS and nMos of TGL MUX. Our findings indicate that a (4, 3) CRO PUF with TGL MUX not only increases the frequency in MHz range but also reduces the CMOS count sufficiently, achieving heightened uniqueness, uniformity and randomness. The proposed design enhances the robustness of the cryptographic responses significantly,