Charge Trap Layer Supercharging for Improved Bit Reliability in 3-D NAND Flash Under Proton Irradiation

Single-event upset (SEU) cross sections are reduced in 176-layer charge trap (CT) 3-D <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nand</small> devices under proton irradiation when multiple write operations are applied sequentially without the typical erase-before-write. This effect is observed for multiple data patterns and in both single-level cell (SLC) and triple-level cell (TLC) operating modes. SEU cross section calculation methodologies are discussed for highly scaled 3-D devices both with and without the application of rewrites, and potential implications for long-term endurance effects are proposed.