Systematical Investigation of Transient Response and Fault Clearing Angle Estimation for Delay-Based PLL Inverters During Grid Fault

For grid-following inverters, the phase-locked loop (PLL) plays a critical role in ensuring transient stability. From the perspective of safe and robust operation, the inverter must remain stable throughout the entire transient process, including during and after grid fault. However, previous research has not provided a systematic and comprehensive analysis of the entire transient response during fault events. This article offers a detailed study of the transient stability of grid-following inverters, combining the equal area criterion with the phase portraits method that accounts for the frequency-dependent impedance. The analysis classifies the system's dynamic behavior into five distinct cases, revealing new phenomena not previously explored, including the identification of an unstable region that emerges after fault recovery, which can lead to system instability. To mitigate this issue, an advanced method for estimating the fault clearing angle is proposed, extending the traditional single-interval approach to multiple intervals, thereby enhancing transient stability during fault recovery. The proposed method and findings are validated through experimental tests on a single-phase grid-connected inverter, confirming their effectiveness and relevance during fault processes.