Improved Threshold Voltage Stability and Gate Reliability in p‐GaN Gate High‐Electron‐Mobility Transistors with Hydrogen Plasma Treatment on the Sidewalls

This study presents a novel approach to enhance the performance and reliability of p‐GaN gate high‐electron‐mobility transistors (HEMTs) through the combination of patterned wet etching and hydrogen plasma with low‐temperature postannealing treatment (HPAT). The wet etching process replaces conventional dry etching, enabling TiN gate metal retraction and simplifying the fabrication process. HPAT effectively passivates the p‐GaN sidewalls by forming an in situ passivation layer, reducing sidewall leakage paths and suppressing hole trapping. These improvements result in three‐order‐of‐magnitude reduction in gate leakage current, 23% decrease in on‐state resistance, and enhanced on/off ratio to 10 8 . Furthermore, gate step stress and positive bias temperature instability stress tests indicate that the HPAT‐HEMT has a more stable threshold voltage ( V TH ). Time‐dependent gate breakdown measurement shows HPAT‐HEMTs a maximum on‐state gate drive voltage of 7.16 V, ensuring reliable operation over a 10 year lifetime with a 63.2% gate failure rate. This proposed methodology provides a simple and effective solution for addressing key challenges in p‐GaN gate HEMTs, offering significant advancements in device performance, V TH stability, and gate reliability for GaN power applications.