Low-Rate Modulo Folded ADC for Detecting Linearly Modulated Communication Symbols
Modulo-folding ADCs (MF-ADCs) offer a potential alternative to conventional ADCs by requiring fewer bits. However, the algorithms that follow an MF-ADC typically require an unfolding method, which demands significant oversampling. In this paper, we explore the problem of symbol detection in digital communication at a receiver using an MF-ADC. We demonstrate that, in certain noisy conditions, unfolding is not necessary for detection, allowing the MF-ADC to operate at a lower rate. Additionally, we show that any unfolding process may negate the benefits of fewer bits or reduced quantization error associated with MF-ADCs. We derive theoretical bounds and discuss optimal symbol design to achieve the best performance. The proposed approach, which eliminates the need for unfolding, can facilitate the development of low-rate MF-ADCs for various other applications.
Authors
- Sibi Raj B. Pillai (ORCID: https://orcid.org/0000-0001-6197-4042)
- Kumar Appaiah (ORCID: https://orcid.org/0000-0002-3149-4416)
- Satish Mulleti (ORCID: https://orcid.org/0000-0002-3995-9070)
Institutions
- Indian Institute of Technology Bombay (IN)
Publication Details
- Published
- 2025-03-12
- DOI
- https://doi.org/10.1109/icassp49660.2025.10890267
- Citations
- 1
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.67