Warpage Calculation Methodology for C2W Hybrid Bonded Wafers

Chip-to-wafer (C2W) hybrid bonding has become a focal point for researchers in advanced packaging due to its ability to simultaneously form dielectric-dielectric and copper-copper bonds with ultra-fine Cu-Cu interconnect pitches while integrating a diverse array of chips with different functionalities, sizes, and technology nodes. Unlike the more established Wafer-to-Wafer (W2W) bonding, C2W hybrid bonding remains in its developmental stages, prompting significant ongoing research in this area. In this paper, we present a novel software tool developed to assist researchers in efficiently calculating optimized chip distribution on a wafer of given dimension, based on essential design parameters, while also providing precise predictions of critical hybrid bonding factors such as wafer warpage and thermal stress. By offering these analytical insights, the tool enables design optimization prior to expensive experimental and fabrication processes, making it an indispensable resource for advancing semiconductor research and development.

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Published
2024-12-03
DOI
https://doi.org/10.1109/eptc62800.2024.10909752
Citations
1
Primary Topic
3D IC and TSV technologies
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article
Field-Weighted Citation Impact
0.21
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Warpage Calculation Methodology for C2W Hybrid Bonded Wafers

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1 citations
3D IC and TSV technologies
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article

Warpage Calculation Methodology for C2W Hybrid Bonded Wafers

Sasi Kumar Tippabhotla, Chirantan Ganguly, Vasarla Nagendra Sekhar, Dileep Kumar Mishra, Bhesetti Chandra Rao, Vempati Srinivasa Rao, Goh Jun Ci
article en
1 citations

Abstract

Chip-to-wafer (C2W) hybrid bonding has become a focal point for researchers in advanced packaging due to its ability to simultaneously form dielectric-dielectric and copper-copper bonds with ultra-fine Cu-Cu interconnect pitches while integrating a diverse array of chips with different functionalities, sizes, and technology nodes. Unlike the more established Wafer-to-Wafer (W2W) bonding, C2W hybrid bonding remains in its developmental stages, prompting significant ongoing research in this area. In this paper, we present a novel software tool developed to assist researchers in efficiently calculating optimized chip distribution on a wafer of given dimension, based on essential design parameters, while also providing precise predictions of critical hybrid bonding factors such as wafer warpage and thermal stress. By offering these analytical insights, the tool enables design optimization prior to expensive experimental and fabrication processes, making it an indispensable resource for advancing semiconductor research and development.

Agency for Science, Technology and Research (SG), Institute of Microelectronics (SG)
Openalex Percentile: Top 43%
3D IC and TSV technologies
0.21
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