Chip to Wafer and Wafer to Wafer Density Estimation and Design Rules Physical Verification
Hybrid bonding, an essential method for integrating diverse packages, offers significant opportunities for pushing the boundaries of pitch scaling in semiconductor technologies. As 3D nodes evolve, it's crucial to investigate new materials and processes to keep pace with these advancements. In this work, we analyze the design rule check and estimate the layer pattern density part of the design that has test structures such as comb, serpentine, daisy chain, kelvin, modified kelvin and meander for chip to wafer (C2W) and wafer to wafer (W2W) bonding.
Authors
- Rahul Dutta (ORCID: https://orcid.org/0000-0001-5254-6994)
- Vasarla Nagendra Sekhar
- Cheemalamarri Hemanth Kumar
- R. Mani (ORCID: https://orcid.org/0009-0004-5615-5586)
Institutions
- Agency for Science, Technology and Research (SG)
- Institute of Microelectronics (SG)
Publication Details
- Published
- 2024-12-03
- DOI
- https://doi.org/10.1109/eptc62800.2024.10909894
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Agency for Science, Technology and Research