Diffraction-Based Alignment Sensor and Mark Design Optimization to Enable Fine Overlay Accuracy for 50um-Thick Si Wafer Bonded to Glass Wafer in Die-to-Wafer Bonding Applications

In this paper, a collective die-to-wafer bonding integration scheme will be investigated. Minimizing the difference between backside and frontside fingerprints using the ASML scanner is the primary goal of this study. In order to expose the wafer backside of the thinned wafer, requirements include aligning to marks present on wafer frontside, along with applying accurate corrections. In addition, the large errors introduced by temporary bonding need to be addressed. A grating mark with and without segmentation measured with ASML SMASH sensor using far infra-red wavelength, is capable addressing the detectability of wafer frontside marks through 50-um Si, and it is shown that we can detect misalignment errors of 200 nm and more.

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Publication Details

Published
2024-12-03
DOI
https://doi.org/10.1109/eptc62800.2024.10909913
Primary Topic
3D IC and TSV technologies
Type
article
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article

Diffraction-Based Alignment Sensor and Mark Design Optimization to Enable Fine Overlay Accuracy for 50um-Thick Si Wafer Bonded to Glass Wafer in Die-to-Wafer Bonding Applications

K. Ceulemans, Charles Schaap, Samuel Suhard, Miller Andy et al.
3D IC and TSV technologies
article

Diffraction-Based Alignment Sensor and Mark Design Optimization to Enable Fine Overlay Accuracy for 50um-Thick Si Wafer Bonded to Glass Wafer in Die-to-Wafer Bonding Applications

K. Ceulemans, Charles Schaap, Samuel Suhard, Miller Andy, V. M. Blanco, Anne Jourdain, Imen Jadli, Koen Kennes, Amir-Hossein Tamaddon, Etienne De Poortere, Alex Hsu
article en

Abstract

In this paper, a collective die-to-wafer bonding integration scheme will be investigated. Minimizing the difference between backside and frontside fingerprints using the ASML scanner is the primary goal of this study. In order to expose the wafer backside of the thinned wafer, requirements include aligning to marks present on wafer frontside, along with applying accurate corrections. In addition, the large errors introduced by temporary bonding need to be addressed. A grating mark with and without segmentation measured with ASML SMASH sensor using far infra-red wavelength, is capable addressing the detectability of wafer frontside marks through 50-um Si, and it is shown that we can detect misalignment errors of 200 nm and more.

IMEC (BE), ASM International (Belgium) (BE), ASML (Netherlands) (NL)
Openalex Percentile: Top 74%
3D IC and TSV technologies
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