Assembly Process Characterization of 3D Stacking of Heterogeneous Chiplets

The market for mobile devices is still growing and show no indications of stopping. Portable devices such as mobile phones requires wireless connectivity and hence driven the growth of Front-End Modules (FEM). There is a need for smaller form factors and higher speed operation. In this work, we have successfully demonstrated an assembly approach of a functional 3D stack chiplet for Duplexer on LNA/SOI using C2W bonding stack-up assembly through via-last TSV process. The chip-to-wafer bonding and different assembly processes will be discussed in the paper. The TSV measurement results and the daisy chain measurement results and reliability assessment results under MSL L3, TC 500 and TCOB 500 will also be updated.