Effect of Decoupling Capacitor Location on PDN Impedance in fcBGA Packages

Rapid evolution of electronics products introduces stringent requirements for direct current (DC) power supply. Suppressing alternative current (AC) noise is one of the key considerations in power rail optimization. AC noise is directly related to the impedance of a power distribution network (PDN), which usually consists of an integrated circuit (IC) chip, a package, and a printed circuit board (PCB). PDN impedance is largely determined by the parasitic parameters of a power net, namely resistance and inductance, and the external components, i.e. capacitors. This paper presents a study on the PDN impedance of flip-chip ball grid array (fcBGA) packages, with the focus on the various locations for decoupling capacitor placement. Key factors are investigated, and guidelines are provided on the placement of decoupling capacitors in fcBGA packages.

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Publication Details

Published
2024-12-03
DOI
https://doi.org/10.1109/eptc62800.2024.10909780
Citations
1
Primary Topic
Semiconductor materials and devices
Type
article
Field-Weighted Citation Impact
0.21
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article

Effect of Decoupling Capacitor Location on PDN Impedance in fcBGA Packages

Xiaoyuan Song, Ping Wei, Bin Zheng, Lei Liu et al.
1 citations
Semiconductor materials and devices
0.21
article

Effect of Decoupling Capacitor Location on PDN Impedance in fcBGA Packages

Xiaoyuan Song, Ping Wei, Bin Zheng, Lei Liu, Jiahu Luo
article en
1 citations

Abstract

Rapid evolution of electronics products introduces stringent requirements for direct current (DC) power supply. Suppressing alternative current (AC) noise is one of the key considerations in power rail optimization. AC noise is directly related to the impedance of a power distribution network (PDN), which usually consists of an integrated circuit (IC) chip, a package, and a printed circuit board (PCB). PDN impedance is largely determined by the parasitic parameters of a power net, namely resistance and inductance, and the external components, i.e. capacitors. This paper presents a study on the PDN impedance of flip-chip ball grid array (fcBGA) packages, with the focus on the various locations for decoupling capacitor placement. Key factors are investigated, and guidelines are provided on the placement of decoupling capacitors in fcBGA packages.

Openalex Percentile: Top 43%
Semiconductor materials and devices
0.21
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Effect of Decoupling Capacitor Location on PDN Impedance in fcBGA Packages — Xiaoyuan Song, Ping Wei, et al. · (2024) | TGRS Research Map | TGRS