Understanding and Improving Rc Management for Wafer Level Packaging Through Novel PVD Processing

The constant drive towards the highest possible performance and efficiency of computer chips in conjunction with shrinking device dimensions represents a significant challenge for the device manufacturer. The packaging of these next generation chips must keep pace with the technological advancements needed during the front-end manufacture. The contact between the bond pad (the final metallization layer in BEOL chip manufacture) and UBM/RDL adhesion layer (the first metallization layer in the Advanced Packaging process) represents a critical juncture. Shrinking contact dimensions make it increasingly important to manage contamination at this interface, since contact surface area reduces, and hence Rc increases, in proportion to 1/r<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. The prevalence of organic materials, such as polybenzooxazole (PBO), polyimide (PI) and epoxy mold compound used in FO-WLP make it increasingly difficult. When placed under vacuum and heated, as happens during the soft etch pre-clean step of the PVD process, even well-cured and degassed organic dielectrics will release moisture and carbon by-products. These materials can then re-contaminate the cleaned pad metal before the adhesion layer is applied. The contact resistance (Rc) here plays a large role in determining the electrical performance of the device and as such has become a critical parameter. In this paper we explain the mechanisms of pad contamination and present the key PVD hardware components that have enabled improved Rc levels. We present a completely novel and unique method of Rc control that shows significant Rc improvement especially at smaller contact sizes down to 15 μm. The novel mode of operation is discussed. Rc at varying contact diameters has been measured using single contact Kelvin Resistors and the results are presented. Our novel PVD technology also has the advantage of producing an atomically clean interface between the pad metal and the PVD adhesion layer metal, as opposed to just reducing oxide growth. This is confirmed by STEM and EDX at the interface and these data are presented.