Study on Substrate Copper Pad Crack Through Experiment and Simulation

Temperature Cycling Test (TCT) is a crucial reliability requirement for electronic components. This paper examines the issue of substrate copper pad cracking during component-level TCT using SACQ solder type. The experiment reveals that intermetallic compound (IMC) growth leads to copper (Cu) consumption on the organic solderability preservative (OSP) surface finish after multiple assembly reflows. Finite element modeling (FEM) identifies high-stress regions at the junction between IMC and Cu around the solder resist opening (SRO), which corresponds with the failure locations observed in the experiment. The study further explores critical design factors in simulation models, including IMC thickness, Cu thickness, SRO size, silicon content, and substrate layer count. Simulation results show a strong correlation with test outcomes across different package types. The paper concludes with recommendations to enhance the overall reliability performance for future package designs.

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Publication Details

Published
2024-12-03
DOI
https://doi.org/10.1109/eptc62800.2024.10909963
Citations
1
Primary Topic
Electronic Packaging and Soldering Technologies
Type
article
Field-Weighted Citation Impact
0.21
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article

Study on Substrate Copper Pad Crack Through Experiment and Simulation

Wei Yu, Wee-Tat Cheong, Ling Pan, Yeow Chon Ong et al.
1 citations
Electronic Packaging and Soldering Technologies
0.21
article

Study on Substrate Copper Pad Crack Through Experiment and Simulation

Wei Yu, Wee-Tat Cheong, Ling Pan, Yeow Chon Ong, Fa Xing
article en
1 citations

Abstract

Temperature Cycling Test (TCT) is a crucial reliability requirement for electronic components. This paper examines the issue of substrate copper pad cracking during component-level TCT using SACQ solder type. The experiment reveals that intermetallic compound (IMC) growth leads to copper (Cu) consumption on the organic solderability preservative (OSP) surface finish after multiple assembly reflows. Finite element modeling (FEM) identifies high-stress regions at the junction between IMC and Cu around the solder resist opening (SRO), which corresponds with the failure locations observed in the experiment. The study further explores critical design factors in simulation models, including IMC thickness, Cu thickness, SRO size, silicon content, and substrate layer count. Simulation results show a strong correlation with test outcomes across different package types. The paper concludes with recommendations to enhance the overall reliability performance for future package designs.

Micron (Singapore) (SG)
Openalex Percentile: Top 43%
Electronic Packaging and Soldering Technologies
0.21
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Study on Substrate Copper Pad Crack Through Experiment and Simulation — Wei Yu, Wee-Tat Cheong, et al. · (2024) | TGRS Research Map | TGRS