Wafer Level Fabrication of Embedded Liquid Cooling Solutions on Heating Devices with TSV Interconnects

The cooling performances of microelectronics chip packages becomes more critical due to the increasing complexity of advance packaging design and its enhanced performance. The demand for thermal management and innovative cooling solutions has surged recently due to the exponential growth of microelectronics technologies. This paper demonstrates the integration of innovative embedded liquid cooling solutions into the 3DIC packaging. The wafer level fabrication process of embedded silicon microfluidic channels, pin-fins features incorporated directly onto the chips heating devices and sensors. In addition to previous work, TSV was integrated into this silicon devices to act as interconnect to stack another layer of similar embedded silicon devices structures. This double stacked cooling layers solutions help to deliver extremely high-power dissipation performance at >600W. The established process integration flows and critical process parameters were introduced. The process challenges and the respective solutions and limitations were addressed and discussed in this paper.