Investigation of UBM/RDL Contact Resistance Based on ICP Sputter Etch Conditions and Critical Design Dimensions

The increasing miniaturization and higher interconnects density in cutting edge electronic packaging architectures require an even tighter control of the contact resistance in manufacturing. In this work, we developed Kelvin structures built with an underlying Al metallization and PBO passivation to characterize the impact of the wafer pre-clean process conditions on the Rc measured after the Ti-Cu metallization. The multi-chamber Indexer system was used to process test vehicles with pre-clean by ICP sputter etch and PVD of adhesion/seed layers. The advantage of the Indexer concept in terms of fast chamber-to-chamber transfer time (i.e., 8.0 sec) and the process strategy dedicated to organic films allow to reach low and stable Rc of order 2.2 mΩ on structures with via diameter of 10.0 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mu \mathrm{m}$</tex> at a throughput up to 75 wafers/hour. Experimental data have shown that the etching amount can be reduced to 1/3 of the value typically required in WLP manufacturing without detrimental effect on Rc.