Panel Level Fine Patterning RDL Interposer Package

The rapid growth of the HPC and AI market has led to an explosive demand for advanced packaging technologies that integrate high-performance, high-capacity heterogeneous semiconductor chips. The most popular 2.5D packaging technology currently in use is the Silicon (Si) interposer, which has advantages in realizing fine circuits but is expensive and difficult to adapt to large-area products. To overcome these shortcomings, alternative technologies to Si interposers are being developed, and among them, RDL Interposers are gaining a lot of attention. RDL Interposers can secure economic feasibility and realize large areas by utilizing panel level packaging technology. In this paper, we conducted research on the key technologies for implementing RDL interposers, such as fine-circuit RDL formation technology and panel warpage control, and implemented a panel level 2.3D 6 Layer RDL Interposer package based on these technologies.