Process Development of Chip to Wafer Hybrid Bonding with Polymer Passivation
The demand for higher performance and enhanced functionality in electronic devices has significantly increased the number of chip interconnects. This trend has led to a dramatic reduction in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{I}/\mathrm{O}$</tex> pitch, resulting in smaller bump sizes and pitches. Hybrid bonding has emerged as a direct solution to accommodate the decreasing bump geometry. However, hybrid bonding requires exceptionally smooth bonding surface — down to 0.3nm - and is highly sensitive to fine particles, which can create interface void up to ten times the size of the particle. Consequently, polymer passivation has gained interest in the industry. In this manuscript, we demonstrated effective copper-copper interconnects achieved through thermo-compression bonding (TCB) with polymer passivation.
Authors
- Vasarla Nagendra Sekhar
- Takenori Fujiwara
- Kota Nomura (ORCID: https://orcid.org/0000-0003-1880-1167)
- Hipona Randy Tupaen
- Ismael Cereno Daniel
- Hitoshi Araki (ORCID: https://orcid.org/0000-0002-9632-7811)
- Dileep Kumar Mishra (ORCID: https://orcid.org/0000-0002-1846-6752)
- Masaya Jukei
- Yu Shoji
- Vempati Srinivasa Rao
- Ser Choong Chong
- Ling Xie
Institutions
- Agency for Science, Technology and Research (SG)
- Institute of Microelectronics (SG)
- Toray Industries, Inc. (Japan) (JP)
Publication Details
- Published
- 2024-12-03
- DOI
- https://doi.org/10.1109/eptc62800.2024.10909685
- Citations
- 1
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.21