Defluxing in Advanced Packaging: Critical Process Considerations and Solutions

Heterogeneous integration has become one of the most important approaches in the semiconductor technology world. The process nodes are constantly shrinking from 16nm to 5nm and lower, with CMOS component speeds continuously increasing. This is equivalent to integrating twice the number of components in the same amount of space every 18-24 months. CoW (Chip on Wafer) is the next generation of CoS (Chip on Substrate) that first combines the chips to the interposer, adds wafer-level molding, and finally, they are connected to the flip chip (FC) substrate. This technology makes a better physical structure for accommodating very large die and larger overall interposer dimensions. At IPC APEX Expo 2022, a technical paper titled 'Defluxing of Copper Pillar Bumped Flip Chips' was presented. This comparative study confirmed that compared to low concentration alkaline cleaning agents, the De-ionized water inline cleaning system is challenged to consistently and effectively clean flux residues underneath low standoff components under copper pillar packages with 150μm pitch and a 30μm Cu pillar height. This study is the continuation of the initial effort but now focuses on cleaning under the next level of ultra-fine pitch CoW devices down to less than l0μm bump pitch and bump counts in excess of 150K. The authors followed the test protocol utilizing the same low-concentration alkaline cleaning agent used in the initial study. In addition, the study also focuses on the impact of wash temperatures and conveyor belt speed. The cleaning assessment methodologies employed analytical/functional testing, including Visual Inspection, FTIR with color mapping, and SEM/EDX.